The present invention pertains generally to oscillator circuits and in particular to a master/slave arrangement for enhancing reliability thereof by providing two oscillators either of which is capable of supplying the output clock signal in the absence of the other.
As is well known, digital electronics circuits require a clock source for providing a periodic (square wave) signal which is used to perform various signal processing functions such as timing, synchronizing, framing, etc. Although various type oscillators, such as crystal oscillators, which employ a piezoelectric crystal for establishing the frequency of operation, have come to be fairly reliable, there may be situations when the circuit in which the oscillator is employed requires even a higher level of component reliability. In those cases, it may be necessary or at least desirable to provide a second oscillator as backup to the first thus assuring the availability of a clock signal in the eventuality that, the first oscillator fails.
With the foregoing in mind, it is a primary object of the present invention to provide a clock source which affords a highly reliable clock signal.
It is a further object of the present invention to provide such source through the use of a master/slave clock arrangement employing two oscillators which affords a smooth transition from a normal mode of operation to a failure mode of operation so that the clock signal is not affected thereby.
It is still a further object of the present invention to provide such an arrangement which is simple in design and lends itself easily to integrated circuit techniques for commercial implementation.